Logic Design and Verification

 0-0 Lakh P/A     4-5 Yrs     02/11/2018     02/12/2018     1 Openings     Full Time    Bangalore

IT Skills
ASIC design, verification concepts,


Other Skills
Verilog, System Verilog, UVM, OVM, VMM,


Keywords
ASIC design, verification concepts, Verilog, System Verilog, UVM, OVM, VMM,


Filters
  Mid Level     No Travel     No Preferences  


Detailed Job Description
1. Good experience in the Logic Design/Verification team.
2. This position requires at least 4yrs of relevant industry experience.
3. Candidate will be involved in logic design and developing Testbench for the Block /
Cluster, Testcases, Testplans and Functional as well as Code coverage.
4. Candidate will work on verification of complex SoCs / IPs and provide technical
leadership to the team.
5. Candidate will develop expertise in multiple areas of verification, RTL, power aware
simulations, drive verification closure, timing closure, formal verification and
equivalence checking on complex modules using SystemVerilog/UVM based
methodology.
Skills Required:
1. Good understanding of ASIC design, verification concepts, techniques and process
from test plan to coverage completion.
2. Prior Experience of verification of complex SoCs / IPs in a leading role in multiple
areas of verification, RTL, power aware simulations, drive verification closure, timing
closure, formal verification and equivalence checking on complex modules using
SystemVerilog/UVM based methodology.
3. Strong Hands-On experience with Verilog/System Verilog and UVM/OVM/VMM.
4. Experience in project planning, resource allocation, scheduling and status reporting.
5. Should be a good mentor and guide for junior engineers in the team.
6. Minimum 4 years of experience in Logic Design/Verification.


Walkin Interview Information
Job Location : Bangalore
Interview Location : Bangalore
Contact Person Name :
Contact Number : 0